SH7206 Datasheet, PDF (1089/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 List of Registers
Module
Name
Register
Power-On Manual
Abbreviation Reset
Reset
Software Module
Standby Standby
Sleep
PFC
PECRL4
Initialized Retained Retained 
Retained
PECRL3
Initialized Retained Retained 
Retained
PECRL2
Initialized Retained Retained 
Retained
PECRL1
Initialized Retained Retained 
Retained
IFCR
Initialized Retained Retained 
Retained
I/O port
PADRH
Initialized Retained Retained 
Retained
PADRL
Initialized Retained Retained 
Retained
PAPRH
Undefined Retained Retained 
Retained
PAPRL
Undefined Retained Retained 
Retained
PBDR
Initialized Retained Retained 
Retained
PBPR
Undefined Retained Retained 
Retained
PCDRL
Initialized Retained Retained 
Retained
PCPRL
Undefined Retained Retained 
Retained
PDDRH
Initialized Retained Retained 
Retained
PDDRL
Initialized Retained Retained 
Retained
PDPRH
Undefined Retained Retained 
Retained
PDPRL
Undefined Retained Retained 
Retained
PEDRH
Initialized Retained Retained 
Retained
PEDRL
Initialized Retained Retained 
Retained
PEPRH
Undefined Retained Retained 
Retained
PEPRL
Undefined Retained Retained 
Retained
PFDR
Initialized Retained Retained 
Retained
Power-down STBCR
mode
STBCR2
Initialized Retained Retained 
Initialized Retained Retained 
Retained
Retained
SYSCR1
Initialized Retained Retained 
Retained
SYSCR2
Initialized Retained Retained 
Retained
STBCR3
Initialized Retained Retained 
Retained
STBCR4
Initialized Retained Retained 
Retained
H-UDI*³
SDIR
Retained Retained Retained Retained Retained
Notes: 1. Retains the previous value after an internal power-on reset by means of the WDT.
2. Bits BN[3:0] are initialized.
3. Initialized by TRST assertion or in the Test-Logic-Reset state of the TAP controller.
Rev. 3.00 Jun. 18, 2008 Page 1065 of 1160
REJ09B0191-0300