SH7206 Datasheet, PDF (903/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 19 Pin Function Controller (PFC)
19.2.2 Port A Control Registers H1 to H3, L1 to L4 (PACRH1 to PACRH3, PACRL1 to
PACRL4)
PACRH1 to PACRH3 and PACRL1 to PACRL4 are 16-bit readable/writable registers that are
used to select the functions of the multiplexed pins on port A.
PACRH1 to PACRH3 and PACRL1 to PACRL4 are initialized to the values shown in table 19.7
by a power-on reset; however, the registers are not initialized by a manual reset or in sleep mode
or software standby mode.
(1) Port A Control Register H3 (PACRH3)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
PA25MD[2:0]
-
PA24MD[2:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R R/W R/W R/W R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 7 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
6 to 4 PA25MD[2:0] 000
R/W PA25 Mode
Select the function of the
PA25/CE2B/DACK3/POE8/PINT7 pin.
000: PA25 I/O (port)
001: CE2B output (BSC)
010: DACK3 output (DMAC)
011: POE8 input (POE2)
100: PINT7 input (INTC)
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
3

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 3.00 Jun. 18, 2008 Page 879 of 1160
REJ09B0191-0300