SH7206 Datasheet, PDF (715/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Port Output Enable 2 (POE2)
Initial
Bit
Bit Name
Value R/W Description
4
MTU2SP6CZE 0
R/W* MTU2S Port 6 Output Comparison/High-Impedance
Enable
Specifies whether to compare output levels for the
MTU2S high-current PD13/TIOC4BS and
PD15/TIOC4DS pins and to place them in high-
impedance state when the OSF2 bit is set to 1 while
the OCE2 bit is 1 or when any one of the POE4F,
POE5F, POE6F, POE7F, and MTU2SHIZ bits is set
to 1. Note that when this bit is used, bits 10 to 8
should be cleared to 0.
0: Does not compare output levels or place the pins in
high-impedance state
1: Compares output levels and places the pins in
high-impedance state
3
—
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
2
MTU2SP7CZE 0
R/W* MTU2S Port 7 Output Comparison/High-Impedance
Enable
Specifies whether to compare output levels for the
MTU2S high-current PD29/TIOC3BS and
PD28/TIOC3DS pins and to place them in high-
impedance state when the OSF2 bit is set to 1 while
the OCE2 bit is 1 or when any one of the POE4F,
POE5F, POE6F, POE7F, and MTU2SHIZ bits is set
to 1. Note that when this bit is used, bits 10 to 8
should be cleared to 0.
0: Does not compare output levels or place the pins in
high-impedance state
1: Compares output levels and places the pins in
high-impedance state
Rev. 3.00 Jun. 18, 2008 Page 691 of 1160
REJ09B0191-0300