SH7206 Datasheet, PDF (703/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Port Output Enable 2 (POE2)
Initial
Bit Bit Name Value R/W Description
14
POE6F 0
R/(W)*¹ POE6 Flag
Indicates that a high impedance request has been input
to the POE6 pin.
[Clearing conditions]
• By writing 0 to POE6F after reading POE6F = 1
(when the falling edge is selected by bits 5 and 4 in
ICSR2)
• By writing 0 to POE6F after reading POE6F = 1 after
a high level input to POE6 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 5 and 4 in ICSR2)
[Setting condition]
13
POE5F 0
• When the input condition set by bits 5 and 4 in ICSR2
occurs at the POE6 pin
R/(W)*¹ POE5 Flag
Indicates that a high impedance request has been input
to the POE5 pin.
[Clearing conditions]
• By writing 0 to POE5F after reading POE5F = 1
(when the falling edge is selected by bits 3 and 2 in
ICSR2)
• By writing 0 to POE5F after reading POE5F = 1 after
a high level input to POE5 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 3 and 2 in ICSR2)
[Setting condition]
• When the input condition set by bits 3 and 2 in ICSR2
occurs at the POE5 pin
Rev. 3.00 Jun. 18, 2008 Page 679 of 1160
REJ09B0191-0300