SH7206 Datasheet, PDF (343/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 8 Bus State Controller (BSC)
CKIO
Tp
Tpw
Trr
Trc
PALL
REF
Trc
Trr
Trc
REF
Trc Tmw Tnop
MRS
A25 to A0
A12/A11*¹
CSn
RASL, RASU
CASL, CASU
RD/WR
DQMxx
D31 to D0
Hi-Z
BS
DACKn*²
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 8.33 SDRAM Mode Write Timing (Based on JEDEC)
Rev. 3.00 Jun. 18, 2008 Page 319 of 1160
REJ09B0191-0300