SH7206 Datasheet, PDF (439/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Item
Phase counting
mode
Buffer operation
Dead time
compensation
counter function
DMAC activation
Channel 0
—
Channel 1
√
√
—
—
—
TGR
compare
match or
input capture
TGR
compare
match or
input
capture
A/D converter start TGRA_0
trigger
compare
match or
input capture
TGRE_0
compare
match
TGRA_1
compare
match or
input
capture
Channel 2
√
Channel 3
—
—
√
—
—
TGR
compare
match or
input capture
TGR
compare
match or
input
capture
TGRA_2
compare
match or
input capture
TGRA_3
compare
match or
input
capture
Channel 4
—
Channel 5
—
√
—
—
√
TGR
—
compare
match or
input capture
and TCNT
overflow or
underflow
TGRA_4
—
compare
match or
input capture
TCNT_4
underflow
(trough) in
complement
ary PWM
mode
Rev. 3.00 Jun. 18, 2008 Page 415 of 1160
REJ09B0191-0300