SH7206 Datasheet, PDF (557/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
(2) Reset-Synchronized PWM Mode Operation
Figure 10.36 shows an example of operation in the reset-synchronized PWM mode. TCNT_3 and
TCNT_4 operate as upcounters. The counter is cleared when a TCNT_3 and TGRA_3 compare-
match occurs, and then begins incrementing from H'0000. The PWM output pin output toggles
with each occurrence of a TGRB_3, TGRA_4, TGRB_4 compare-match, and upon counter clears.
TCNT_3 and TCNT_4
values
TGRA_3
TGRB_3
TGRA_4
TGRB_4
H'0000
TIOC3B
TIOC3D
Time
TIOC4A
TIOC4C
TIOC4B
TIOC4D
Figure 10.36 Reset-Synchronized PWM Mode Operation Example
(When TOCR’s OLSN = 1 and OLSP = 1)
Rev. 3.00 Jun. 18, 2008 Page 533 of 1160
REJ09B0191-0300