SH7206 Datasheet, PDF (584/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
TGRA_3
TCDR
Synchronous clearing
Bit WRE = 1
TGRB_3
TCNT_3
(MTU2)
TCNT_4
(MTU2)
TDDR
H'0000
Positive phase
Negative phase
Output waveform is active-low.
Figure 10.59 Example of Synchronous Clearing in Interval Tb at Crest
(Timing (6) in Figure 10.56; Bit WRE of TWCR in MTU2 is 1)
Rev. 3.00 Jun. 18, 2008 Page 560 of 1160
REJ09B0191-0300