 English |
|
|
|
|
|
|
|
| SH7641 Datasheet, PDF (991/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series | |||
| |||
| ◁ |
Section 25 Electrical Characteristics
Tr
Tc1
Tc2
Tc3
Tc4
Trwl
CKIO
A25 to A0
A12/A11*1
tAD1
tAD1
Row
address
tAD1
tAD1
tAD1
tAD1
Column
address
WRIT command
tAD1
tAD1
tAD1
tAD1
WriteA
command
tCSD1
tCSD1
CSn
RD/WR
tRWD1
tRWD1
tRASD1
tRASD1
tRWD1
RASU/L
CASU/L
tCASD1
tDQMD1
tCASD1
tDQMD1
DQMxx
tWDD2
tWDH2
tWDD2
tWDH2
D31 to D0
tBSD
tBSD
BS
CKE
DACKn*2
tDACD
(High)
tDACD
Note: 1. An address pin to be connected to pin A10 of SDRAM.
2. Waveform for DACKn when active low is selected.
Figure 25.29 Synchronous DRAM Burst Write Bus Cycle
(Four Write Cycles) (Auto Precharge, WTRCD = 0 Cycle, TRWL = 1 Cycle)
Rev. 4.00 Sep. 14, 2005 Page 941 of 982
REJ09B0023-0400
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese