SH7641 Datasheet, PDF (192/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 3 DSP Operation
Control
LAB=MAB;
if ( Ms!=NLS && W/L is word access ) { /* MOVS.W */
if (LS==load) {
if (Ds!=A0G && Ds!=A1G) {
Ds[31:16] = LDB[15:0]; Ds[15:0] = 0x0000;
if (Ds==A0) A0G[7:0] = sign-extension of LDB;
if (Ds==A1) A1G[7:0] = sign-extension of LDB;
}
else Ds[7:0] = LDB[7:0];
/* Ds is A0G or A1G */
}
else { /* Store */
if (Ds!=A0G && Ds!=A1G) LDB[15:0] = Ds[31:16];
/* Ds is A0G or A1G */
else LDB[15:0] = Ds[7:0] with 8bit sign-extension;
}
}
else if ( MA!=NLS && W/L is long-word access ) { /* MOVS.L */
if (LS==load) {
if (Ds!=A0G && Ds!=A1G) {
Ds[31:0] = LDB[31:0];
if (Ds==A0) A0G[7:0] = sign-extension of LDB;
if (Ds==A1) A1G[7:0] = sign-extension of LDB;
}
else Ds[7:0] = LDB[7:0]; /* Ds is A0G or A1G */
}
else { /* Store */
if (Ds!=A0G && Ds!=A1G) LDB[31:0] = Ds[31:0];
/* Ds is A0G or A1G */
else LDB[31:0] = Ds[7:0] with 24bit sign-extension;
}
}
Rev. 4.00 Sep. 14, 2005 Page 142 of 982
REJ09B0023-0400