SH7641 Datasheet, PDF (384/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 12 Bus State Controller (BSC)
Ta1
Tadw
Ta2
Ta3
T1
Tw
Twx
T2
CKIO
A25 to A16
CS5B
RD/WR
Read
Write
AH
RD
D7 to D0 or
D15 to D0
WEn
D7 to D0 or
D15 to D0
WAIT
BS
Address
Address
Data
Data
DACKn*
Note: * The waveform for DACKn is when active low is specified.
Figure 12.14 Access Timing for MPX Space
(Address Cycle Access Wait 1, Data Cycle Wait 1, External Wait 1)
Rev. 4.00 Sep. 14, 2005 Page 334 of 982
REJ09B0023-0400