SH7641 Datasheet, PDF (533/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 16 I²C Bus Interface 2 (IIC2)
Initial
Bit
Bit Name Value R/W Description
3
STIE
0
R/W Stop Condition Detection Interrupt Enable
This bit enables or disables the stop condition (STPI)
when the STOP bit in ICSR is set .
0: Stop condition detection interrupt request (STPI) is
disabled.
1: Stop condition detection interrupt request (STPI) is
enabled.
2
ACKE
0
R/W Acknowledge Bit Judgment Select
0: The value of the receive acknowledge bit is ignored,
and continuous transfer is performed.
1: If the receive acknowledge bit is 1, continuous
transfer is halted.
1
ACKBR
0
R Receive Acknowledge
In transmit mode, this bit stores the acknowledge data
that are returned by the receive device. This bit cannot
be modified. This bit can be canceled by clearing the
BBSY bit in ICCR2 to 1.
0: Receive acknowledge = 0
1: Receive acknowledge = 1
0
ACKBT
0
R/W Transmit Acknowledge
In receive mode, this bit specifies the bit to be sent at
the acknowledge timing.
0: 0 is sent at the acknowledge timing.
1: 1 is sent at the acknowledge timing.
Rev. 4.00 Sep. 14, 2005 Page 483 of 982
REJ09B0023-0400