SH7641 Datasheet, PDF (916/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 24 List of Registers
24.1 Register Addresses (by functional module, in order of the
corresponding section numbers)
Entries under Access size indicates numbers of bits.
Note: Access to undefined or reserved addresses is prohibited. Since operation or continued
operation is not guaranteed when these registers are accessed, do not attempt such access.
Register Name
Frequency control register
—
Watchdog timer counter
Watchdog timer control/status register
—
Standby control register
Standby control register 2
Standby control register 3
Standby control register 4
—
Cache control register 1
Cache control register 2
—
Interrupt event register 2
TRAPA exception register
Exception event register
—
Interrupt priority registers F
Interrupt priority registers G
Interrupt priority registers H
Interrupt priority registers I
Abbreviation
FRQCR
—
WTCNT
WTCSR
—
STBCR
STBCR2
STBCR3
STBCR4
—
CCR1
CCR2
—
INTEVT2
TRA
EXPEVT
—
IPRF
IPRG
IPRH
IPRI
Bit No.
16
—
8
8
—
8
8
8
8
—
32
32
—
32
32
32
—
16
16
16
16
Address
H'A415FF80
—
H'A415FF84
H'A415FF86
—
H'A415FF82
H'A415FF88
H'A40A0000
H'A40A0004
—
H'FFFFFFEC
H'A40000B0
—
H'A400 0000
H'FFFFFFD0
H'FFFFFFD4
—
H'A408 0000
H'A408 0002
H'A408 0004
H'A408 0006
Module
Access States
CPG
16
—
WDT
—
16*¹
16*²
—
—
Power-down 8
modes
8
8
8
—
—
Cache
32
32
—
—
Exception
32
handling
32
32
—
—
INTC
16
16
16
16
Rev. 4.00 Sep. 14, 2005 Page 866 of 982
REJ09B0023-0400