SH7641 Datasheet, PDF (71/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 1 Overview
Classification
Direct memory
access controller
(DMAC)
User debugging
interface
(H-UDI)
Advanced user
debugger
(AUD)
E10A interface
I²C bus interface 2
Symbol
I/O
DREQ0,
I
DREQ1
DACK0,
O
DACK1
TEND0
O
TCK
I
TMS
I
TDI
I
TDO
O
TRST
I
AUDATA3 to O
AUDATA0
AUDCK
O
AUDSYNC O
ASEBRKAK O
ASEMD0
I
SCL
I/O
SDA
I/O
Name
Function
DMA-transfer
request
Input pin for external requests for
DMA transfer.
DMA-transfer
request receive
Output pin for request receive, in
response to external requests for
DMA transfer.
DMA-transfer end Output pin for DMA transfer end
output
signal
Test clock
Test-clock input pin.
Test mode select Inputs the test-mode select signal.
Test data input Serial input pin for instructions and
data.
Test data
output
Serial output pin for instructions and
data.
Test reset
Initialization-signal input pin.
AUD data
Data output pins in AUD-trace mode.
AUD clock
AUD sync
signal
Break mode
acknowledge
ASE mode
Serial clock pin
Serial data pin
Sync-clock output pin in AUD-trace
mode.
Data start-position acknowledge-
signal output pin in AIUD-trace
mode.
Indicates that the E10A emulator has
entered its break mode.
For the connection with the E10A,
see the SH7641 E10A Emulator
User's Manual (tentative title).
Sets the ASE mode.
Serial clock input/output pin
Serial data input/output pin
Rev. 4.00 Sep. 14, 2005 Page 21 of 982
REJ09B0023-0400