SH7641 Datasheet, PDF (90/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 2 CPU
The DSP unit has one control register, the DSP status register (DSR). DSR holds the status of DSP
data operation results (zero, negative, and so on) and has a DC bit which is similar to the T bit in
the CPU. The DC bit indicates one of the status flags. A DSP data processing instruction controls
its execution based on the DC bit. This control affects only the operations in the DSP unit; it
controls the update of DSP registers only. It cannot control operations in the CPU, such as address
register updating and load/store operations. Control bits CS2 to CS0 specify the condition to be
reflected in the DC bit.
Unconditional DSP type data operations, except PMULS, MOVX, MOVY and MOVS, update the
condition flags and DC bit, but no CPU instructions, including MAC instructions, update the DC
bit. Conditional DSP type instructions do NOT update DSR either.
Rev. 4.00 Sep. 14, 2005 Page 40 of 982
REJ09B0023-0400