SH7641 Datasheet, PDF (573/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

• Timer I/O control register L_3 (TIORL_3)
• Timer interrupt enable register_3 (TIER_3)
• Timer status register_3 (TSR_3)
• Timer counter_3 (TCNT_3)
• Timer general register A_3 (TGRA_3)
• Timer general register B_3 (TGRB_3)
• Timer general register C_3 (TGRC_3)
• Timer general register D_3 (TGRD_3)
• Timer control register_4 (TCR_4)
• Timer mode register_4 (TMDR_4)
• Timer I/O control register H_4 (TIORH_4)
• Timer I/O control register L_4 (TIORL_4)
• Timer interrupt enable register_4 (TIER_4)
• Timer status register_4 (TSR_4)
• Timer counter_4 (TCNT_4)
• Timer general register A_4 (TGRA_4)
• Timer general register B_4 (TGRB_4)
• Timer general register C_4 (TGRC_4)
• Timer general register D_4 (TGRD_4)
Common registers:
• Timer start register (TSTR)
• Timer synchro register (TSYR)
Common registers for timers 3 and 4:
• Timer output master enable register (TOER)
• Timer output control register (TOCR)
• Timer gate control register (TGCR)
• Timer cycle data register (TCDR)
• Timer dead time data register (TDDR)
• Timer subcounter (TCNTS)
• Timer cycle buffer register (TCBR)
Section 18 Multi-Function Timer Pulse Unit (MTU)
Rev. 4.00 Sep. 14, 2005 Page 523 of 982
REJ09B0023-0400