SH7641 Datasheet, PDF (618/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
TCNT value
H'0180
H'0160
Counter cleared by TIOCB
input (falling edge)
H'0010
H'0005
H'0000
TIOCA
TGRA
H'0005
H'0160
Time
H'0010
TIOCB
TGRB
H'0180
Figure 18.10 Example of Input Capture Operation
18.4.2 Synchronous Operation
In synchronous operation, the values in a number of TCNT counters can be rewritten
simultaneously (synchronous presetting). Also, a number of TCNT counters can be cleared
simultaneously by making the appropriate setting in TCR (synchronous clearing).
Synchronous operation enables TGR to be incremented with respect to a single time base.
Channels 0 to 4 can all be designated for synchronous operation.
Rev. 4.00 Sep. 14, 2005 Page 568 of 982
REJ09B0023-0400