SH7641 Datasheet, PDF (535/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 16 I²C Bus Interface 2 (IIC2)
Initial
Bit
Bit Name Value R/W Description
4
NACKF
0
R/W No Acknowledge Detection Flag
[Setting condition]
• When no acknowledge is detected from the receive
device in transmission while the ACKE bit in ICIER
is 1
[Clearing condition]
• When 0 is written in NACKF after reading NACKF
=1
3
STOP
0
R/W Stop Condition Detection Flag
[Setting condition]
• When a stop condition is detected after frame
transfer
[Clearing condition]
• When 0 is written in STOP after reading STOP = 1
2
AL/OVE
0
R/W Arbitration Lost Flag/Overrun Error Flag
This flag indicates that arbitration was lost in master
mode with the I²C bus format and that the final bit has
been received while RDRF = 1 with the clocked
synchronous format.
When two or more master devices attempt to seize the
bus at nearly the same time, if the I²C bus interface
detects data differing from the data it sent, it sets AL to
1 to indicate that the bus has been taken by another
master.
[Setting conditions]
• If the internal SDA and SDA pin disagree at the rise
of SCL in master transmit mode
• When the SDA pin outputs high in master mode
while a start condition is detected
• When the final bit is received with the clocked
synchronous format while RDRF = 1
[Clearing condition]
• When 0 is written in AL/OVE after reading AL/OVE
=1
Rev. 4.00 Sep. 14, 2005 Page 485 of 982
REJ09B0023-0400