SH7641 Datasheet, PDF (480/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 13 Direct Memory Access Controller (DMAC)
These are selected by the PR1 and the PR0 bits in the DMA operation register (DMAOR).
Round-Robin Mode: Each time one word, byte, or longword is transferred on one channel, the
priority order is rotated. The channel on which the transfer was just finished rotates to the bottom
of the priority order. The round-robin mode operation is shown in figure 13.3. The priority of the
round-robin mode is CH0 > CH1 > CH2 > CH3 immediately after reset.
When the round-robin mode has been specified, do not concurrently specify cycle steal mode and
burst mode as the bus modes of any two channels.
(1) When channel 0 transfers
Initial priority order
Priority order
afrer transfer
(2) When channel 1 transfers
Initial priority order
Priority order
afrer transfer
(3) When channel 2 transfers
Initial priority order
Priority order
afrer transfer
Post-transfer priority order
when there is an
immediate transfer
request to channel 5 only
(4) When channel 3 transfers
Priority order
afrer transfer
Priority order
afrer transfer
CH0 > CH1 > CH2 > CH3
CH1 > CH2 > CH3 > CH0
Channel 0 becomes bottom
priority
CH0 > CH1 > CH2 > CH3
CH2 > CH3 > CH0 > CH1
Channel 1 becomes bottom
priority.
The priority of channel 0, which
was higher than channel 1, is also
shifted.
CH0 > CH1 > CH2 > CH3
CH3 > CH0 > CH1 > CH2
CH2 > CH3 > CH0 > CH1
Channel 2 becomes bottom
priority.
The priority of channels 0 and 1,
which were higher than channel 2,
are also shifted. If immediately
after there is a request to transfer
channel 1 only, channel 1 becomes
bottom priority and the priority of
channels 0 and 3, which were
higher than channel 1, are also
shifted.
CH0 > CH1 > CH2 > CH3
Priority order does not change
CH0 > CH1 > CH2 > CH3
Figure 13.3 Round-Robin Mode
Rev. 4.00 Sep. 14, 2005 Page 430 of 982
REJ09B0023-0400