SH7641 Datasheet, PDF (550/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 16 I²C Bus Interface 2 (IIC2)
SCL
SDA
(Input)
MST
1
2
Bit 0 Bit 1
7
8
1
Bit 6 Bit 7 Bit 0
7
8
1
2
Bit 6 Bit 7 Bit 0 Bit 1
TRS
RDRF
ICDRS
Data 1
Data 2
Data 3
ICDRR
User
processing ^{[2] Set MST}
(when outputting the clock)
Data 1
[3] Read ICDRR
Figure 16.15 Receive Mode Operation Timing
Data 2
[3] Read ICDRR
SCL
SDA
(Input)
MST
RCVD
BC2 to BC0
1
2
3
4
5
6
7
8
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
000
111 110 101 100 011 010 001 000
[2] Set MST
[3] Set the RCVD bit after checking if BSC2 = 1
Figure 16.16 Operation Timing For Receiving One Byte
Rev. 4.00 Sep. 14, 2005 Page 500 of 982
REJ09B0023-0400