SH7641 Datasheet, PDF (672/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
Timing for Counter Clearing by Compare Match/Input Capture: Figure 18.60 shows the
timing when counter clearing on compare match is specified, and figure 18.61 shows the timing
when counter clearing on input capture is specified.
Pφ
Compare
match signal
Counter
clear signal
TCNT
N
H'0000
TGR
N
Figure 18.60 Counter Clear Timing (Compare Match)
Pφ
Input capture
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 18.61 Counter Clear Timing (Input Capture)
Rev. 4.00 Sep. 14, 2005 Page 622 of 982
REJ09B0023-0400