SH7641 Datasheet, PDF (182/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 3 DSP Operation
CASE 4: 4 or More Repeated Instructions
REPEAT RptStart, RptEnd, RptCount;
----
instr0;
RptStart instr1;
Repeated instruction 1
instr2;
Repeated instruction 2
instr3;
Repeated instruction 3
----------------------------------------------------------
instrN-3;
Repeated instruction N-3
instrN-2;
Repeated instruction N-2
instrN-1;
Repeated instruction N-1
RptEnd
instrN;
Repeated instruction N
instrN+1;
The expanded results of each case corresponds to the same case numbers in note 1.
3.2.2 DSP Data Addressing
This LSI has two types of memory access instructions: one type is X and Y data transfer
instructions (MOVX.W and MOVY.W), and the other is single data transfer instructions
(MOVS.W and MOVS.L). Data addressing of these two types of instruction are different. Table
3.18 shows a summary of DSP data transfer instructions.
Rev. 4.00 Sep. 14, 2005 Page 132 of 982
REJ09B0023-0400