SH7641 Datasheet, PDF (819/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Setup Stage:
USB function
SETUP token reception
Section 20 USB Function Module
Application
Receive 8-byte command
data in EP0s
Command
to be processed by
application?
No
Automatic
processing by
this module
Yes
Set setup command
reception complete flag
(USBIFR0/SETUP TS = 1)
Interrupt request
Clear SETUP TS flag
(USBIFR0/SETUP TS = 0)
Clear EP0i FIFO (UFCLR/EP0iCLR = 1)
Clear EP0o FIFO (UFCLR/EP0oCLR = 1)
To data stage
Read 8-byte data from EP0s
Decode command data
Determine data stage direction*¹
Write 1 to EP0s read complete bit
(USBTRG/EP0s RDFN = 1)
To control-in
data stage
*²
To control-out
data stage
Notes: 1. In the setup stage, the application analyzes command data from the host requiring processing by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
2. When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
Figure 20.5 Setup Stage Operation
Rev. 4.00 Sep. 14, 2005 Page 769 of 982
REJ09B0023-0400