SH7641 Datasheet, PDF (273/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 10 Interrupt Controller (INTC)
10.3.1 Interrupt Priority Registers B to J (IPRB to IPRJ)
IPRB to IPRJ are 16-bit readable/writable registers in which priority levels from 0 to 15 are set for
on-chip peripheral module and IRQ interrupts. These registers are initialized to H'0000 by a
power-on reset or manual reset, but are not initialized in standby mode.
Initial
Bit
Bit Name Value R/W Description
15
IPR15
0
14
IPR14
0
13
IPR13
0
R/W These bits set the priority level for each interrupt
R/W ^{source in 4-bit units. For details, see table 10.2,}
Interrupt Sources and IPRB to IPRJ.
R/W
12
IPR12
0
R/W
11
IPR11
0
R/W
10
IPR10
0
R/W
9
IPR9
0
R/W
8
IPR8
0
R/W
7
IPR7
0
R/W
6
IPR6
0
R/W
5
IPR5
0
R/W
4
IPR4
0
R/W
3
IPR3
0
R/W
2
IPR2
0
R/W
1
IPR1
0
R/W
0
IPR0
0
R/W
Rev. 4.00 Sep. 14, 2005 Page 223 of 982
REJ09B0023-0400