SH7641 Datasheet, PDF (643/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
TGRC_3
TCBR
TDDR
TGRA_3
TCDR
Comparator
TCNT_3
TCNTS TCNT_4
Comparator
Match
signal
Match
signal
TGRD_3
TGRC_4
TGRD_4
PWM cycle
output
PWM output 1
PWM output 2
PWM output 3
PWM output 4
PWM output 5
PWM output 6
External cutoff
input
POE0
POE1
POE2
POE3
External cutoff
interrupt
: Registers that can always be read or written from the CPU
: Registers that can be read or written from the CPU
(but for which access disabling can be set by port E)
: Registers that cannot be read or written from the CPU
(except for TCNTS, which can only be read)
Figure 18.32 Block Diagram of Channels 3 and 4 in Complementary PWM Mode
Rev. 4.00 Sep. 14, 2005 Page 593 of 982
REJ09B0023-0400