SH7641 Datasheet, PDF (706/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
(13) Operation when Error Occurs during PWM Mode 2 Operation, and Operation is
Restarted in Normal Mode
Figure 18.97 shows an explanatory diagram of the case where an error occurs in PWM mode 2
and operation is restarted in normal mode after re-setting.
MTU module
output
TIOC*A
1
2
3
4
5
6
7
8
9
10 11 12 13
RESET TMDR TIOR PFC TSTR Match Error PFC TSTR TMDR TIOR PFC TSTR
(PWM2) (1 init (MTU) (1)
occurs (PORT) (0) (normal) (1 init (MTU) (1)
0 out)
0 out)
• Not initialized (cycle register)
TIOC*B
Port output
TIOC*A/PTE[n]
High-Z
TIOC*B/PTE[n]
High-Z
n = 0 to 15
Figure 18.97 Error Occurrence in PWM Mode 2, Recovery in Normal Mode
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. Set PWM mode 2.
3. Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence. In PWM mode 2, the cycle register pins are not initialized. In the
example, TIOC *A is the cycle register.)
4. Set MTU output with the PFC.
5. The count operation is started by TSTR.
6. Output goes low on compare-match occurrence.
7. An error occurs.
8. Set port output with the PFC and output the inverse of the active level.
9. The count operation is stopped by TSTR.
10. Set normal mode.
11. Initialize the pins with TIOR.
12. Set MTU output with the PFC.
13. Operation is restarted by TSTR.
Rev. 4.00 Sep. 14, 2005 Page 656 of 982
REJ09B0023-0400