SH7641 Datasheet, PDF (628/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
Example of PWM Mode Setting Procedure: Figure 18.20 shows an example of the PWM mode
setting procedure.
PWM mode
Select counter clock
[1]
Select counter clearing
[2]
source
Select waveform
[3]
output level
Set TGR
[4]
Set PWM mode
[5]
Start count
[6]
[1] Select the counter clock with bits TPSC2 to TPSC0
in TCR. At the same time, select the input clock
edge with bits CKEG1 and CKEG0 in TCR.
[2] Use bits CCLR2 to CCLR0 in TCR to select the
TGR to be used as the TCNT clearing source.
[3] Use TIOR to designate the TGR as an output
compare register, and select the initial value and
output value.
[4] Set the cycle in the TGR selected in [2], and set the
duty in the other TGR.
[5] Select the PWM mode with bits MD3 to MD0 in
TMDR.
[6] Set the CST bit in TSTR to 1 to start the count
operation.
<PWM mode>
Figure 18.20 Example of PWM Mode Setting Procedure
Examples of PWM Mode Operation: Figure 18.21 shows an example of PWM mode 1
operation.
In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA
initial output value and output value, and 1 is set as the TGRB output value.
In this case, the value set in TGRA is used as the period, and the values set in the TGRB registers
are used as the duty cycle.
TCNT value
TGRA
Counter cleared by
TGRA compare match
TGRB
H'0000
Time
TIOCA
Figure 18.21 Example of PWM Mode Operation (1)
Rev. 4.00 Sep. 14, 2005 Page 578 of 982
REJ09B0023-0400