SH7641 Datasheet, PDF (619/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
Example of Synchronous Operation Setting Procedure: Figure 18.11 shows an example of the
synchronous operation setting procedure.
Synchronous operation
selection
Set synchronous
operation
[1]
Synchronous presetting
Set TCNT
[2]
Synchronous clearing
Clearing
No
source generation
channel?
Yes
Select counter
clearing source
[3]
Start count
[5]
Set synchronous
counter clearing
[4]
Start count
[5]
<Synchronous presetting>
<Counter clearing>
<Synchronous clearing>
[1] Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous operation.
[2] When the TCNT counter of any of the channels designated for synchronous operation is written to, the same value
is simultaneously written to the other TCNT counters.
[3] Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare, etc.
[4] Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing source.
[5] Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.
Figure 18.11 Example of Synchronous Operation Setting Procedure
Rev. 4.00 Sep. 14, 2005 Page 569 of 982
REJ09B0023-0400