SH7641 Datasheet, PDF (990/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 25 Electrical Characteristics
CKIO
Tr
Trw
Trw
Tc1
Trwl
A25 to A0
A12/A11*¹
CSn
RD/WR
RASU/L
CASU/L
DQMxx
t_AD1
Row address
t_AD1
t_CSD1
t_RWD1
t_RASD1
t_RASD1
t_DQMD1
D31 to D0
BS
t_AD1
t_AD1
Column
address
t_AD1
t_AD1
WriteA
command
t_CSD1
t_RWD1
t_RWD1
t_CASD1
t_CASD1
t_DQMD1
t_WDD2
t_WDH2
t_BSD
t_BSD
CKE
DACKn*²
t_DACD
(High)
t_DACD
Note: 1. An address pin to be connected to pin A10 of SDRAM.
2. Waveform for DACKn when active low is selected.
Figure 25.28 Synchronous DRAM Single Write Bus Cycle
(Auto Precharge, WTRCD = 2 Cycles, TRWL = 1 Cycle)
Rev. 4.00 Sep. 14, 2005 Page 940 of 982
REJ09B0023-0400