SH7641 Datasheet, PDF (577/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
Table 18.7 TPSC0 to TPSC2 (Channel 2)
Bit 2
Channel TPSC2
Bit 1
TPSC1
Bit 0
TPSC0
Description
2
0
0
0
Internal clock: counts on Pφ/1
1
Internal clock: counts on Pφ/4
1
0
Internal clock: counts on Pφ/16
1
Internal clock: counts on Pφ/64
1
0
0
External clock: counts on TCLKA pin input
1
External clock: counts on TCLKB pin input
1
0
External clock: counts on TCLKC pin input
1
Internal clock: counts on Pφ/1024
Note: This setting is ignored when channel 2 is in phase counting mode.
Table 18.8 TPSC0 to TPSC2 (Channels 3 and 4)
Channel
3, 4
Bit 2
TPSC2
0
1
Bit 1
TPSC1
0
1
0
1
Bit 0
TPSC0
0
1
0
1
0
1
0
1
Description
Internal clock: counts on Pφ/1
Internal clock: counts on Pφ/4
Internal clock: counts on Pφ/16
Internal clock: counts on Pφ/64
Internal clock: counts on Pφ/256
Internal clock: counts on Pφ/1024
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Rev. 4.00 Sep. 14, 2005 Page 527 of 982
REJ09B0023-0400