SH7641 Datasheet, PDF (681/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 18 Multi-Function Timer Pulse Unit (MTU)
Pφ
Address
Write signal
Compare
match signal
Compare
match buffer
signal
Buffer register
TGR write cycle
T1
T2
Buffer register
address
Buffer register write data
N
M
TGR
M
Figure 18.74 Conflict between Buffer Register Write and Compare Match (Channel 0)
Pφ
Address
Write signal
Compare match
signal
Compare match
buffer signal
Buffer register
TGR write cycle
T1
T2
Buffer register
address
Buffer register write data
N
M
TGR
N
Figure 18.75 Conflict between Buffer Register Write and Compare Match
(Channels 3 and 4)
Rev. 4.00 Sep. 14, 2005 Page 631 of 982
REJ09B0023-0400