SH7641 Datasheet, PDF (100/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 2 CPU
Addressing
Mode
Instruction
Format
PC-relative with @(disp:8, PC)
displacement
Effective Address Calculation Method
Calculation Formula
Effective address is PC with 8-bit
Word: PC + disp × 2
displacement disp added. After disp is zero-
extended, it is multiplied by 2 (word) or 4
(longword),
according to the operand size. With a
Longword:
PC&H'FFFFFFFC
+ disp × 4
longword operand, the lower 2 bits of PC are
masked.
PC
&^*
H'FFFFFFFC
+
disp
(zero-extended)
×
PC + disp × 2
or
PC&H'FFFFFFFC
+ disp × 4
2/4
* : With longword operand
PC-relative
disp:8
Effective address is PC with 8-bit
displacement disp added after being sign-
extended and multiplied by 2.
PC + disp × 2
PC
disp
+
(sign-extended)
×
2
PC + disp × 2
disp:12
Effective address is PC with 12-bit
displacement disp added after being sign-
extended and multiplied by 2
PC + disp × 2
PC
disp
+
(sign-extended)
×
2
PC + disp × 2
Rn
Effective address is sum of PC and Rn.
PC + Rn
PC
+
PC + Rn
Rn
Rev. 4.00 Sep. 14, 2005 Page 50 of 982
REJ09B0023-0400