SH7641 Datasheet, PDF (1002/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Section 25 Electrical Characteristics
CKIO
A25 to A0
A12/A11*¹
Tr
Tc
Td1 Tde
Tap
Tr
Tc Tnop Trw1 Tap
t_AD3
t_AD3
t_AD3
Row Column
address address
t_AD3
t_AD3
t_AD3
ReadA
Command
t_AD3
t_AD3
Row
address
t_AD3
Column
address
t_AD3
t_AD3
t_AD3
WriteA
Command
t_AD3
CSn
RD/WR
RASU/L
CASU/L
t_CSD2
t_CSD2
t_RWD2
t_RASD2 t_RASD2
t_CASD2 t_CASD2 t_CASD2
t_CSD2
t_CSD2
t_RWD2 t_RWD2
t_RASD2 t_RASD2
t_CASD2 t_CASD2
DQMxx
D31 to D0
BS
t_DQMD2
t_DQMD2
t_RDH4
t_RDS4
t_BSD
t_BSD
t_DQMD2
t_DQMD2
t_WDD3 t_WDH3
t_BSD
t_BSD
CKE
DACKn,
TENDn*²
t_DACD
(High)
t_DACD
t_DACD
(High)
t_DACD
Note: 1. An address pin to be connected to pin A10 of SDRAM.
2. Waveform for DACKn and TENDn when active low is selected.
Figure 25.40 Synchronous DRAM Access Timing in Low-Frequency Mode
(Auto-Precharge, TRWL = 2 Cycles)
Rev. 4.00 Sep. 14, 2005 Page 952 of 982
REJ09B0023-0400