SH7641 Datasheet, PDF (8/1036 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7641 Series

Preface
The SH7641 RISC (Reduced Instruction Set Computer) microcomputer includes a Renesas
Technology original RISC CPU as its core, and the peripheral functions required to configure a
system.
Target Users: This manual was written for users who will be using this LSI in the design of
application systems. Users of this manual are expected to understand the
fundamentals of electrical circuits, logical circuits, and microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of this LSI to the above users.
Refer to the SH-3/SH-3E/SH3-DSP Software Manual for a detailed description of
the instruction set.
Notes on reading this manual:
• Product names
The following products are covered in this manual.
Product Classifications and Abbreviations
Basic Classification
SH7641
Product Code
HD6417641
• In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
• In order to understand the details of the CPU's functions
Read the SH-3/SH-3E/SH3-DSP Software Manual.
This product does not support the MMU functions. For example, the LDTLB instruction code
is executed as the NOP instruction.
Rev. 4.00 Sep. 14, 2005 Page viii of l