QG5000XSL9TH Datasheet, PDF (92/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Register Description
Device:
Function:
Offset:
Version:
16
0
57h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
Bit
Attr
Default
Description
7:0
RO
04h
Maximum_number_DIMM_per_channel:
Set by hardware to indicate the maximum number of FB-DIMM AMBs per
channel that the MCH supports.
3.8.3.6
Map to AMB Registers
In Table 3-30, each 2 KB range is mapped to individual AMB registers by address
translation of MCH. The address of this relocatable register area is specified in the
AMBASE register. Configuration transactions targeting these ranges are converted to
FB-DIMM commands by the MCH and sent to the FB-DIMM channel subject to
AMBPRESENT register settings.
The AMB register’s PCI function (3 bits) and offset (8 bits) are used as the offset (11
bits) from the base of each 2 KB range for the specific AMB register space.
Table 3-30. Register Offsets in AMB Memory Mapped Registers Region (Sheet 1 of 2)
7FFh-0h
FFFh-800h
17FFh-1000h
1FFFh-1800h
27FFh-2000h
2FFFh-2800h
37FFh-3000h
3FFFh-3800h
47FFh-4000h
4FFFh-4800h
57FFh-5000h
5FFFh-5800h
67FFh-6000h
6FFFh-6800h
77FFh-7000h
7FFFh-7800h
87FFh-8000h
8FFFh-8800h
97FFh-9000h
9FFFh-9800h
A7FFh-A000h
AFFFh-A800h
B7FFh-B000h
BFFFh-B800h
C7FFh-C000h
CFFFh-C800h
D7FFh-D000h
DFFFh-D800h
E7FFh-E000h
EFFFh-E800h
map to channel_0, AMB_0 registers
map to channel_0, AMB_1 registers
map to channel_0, AMB_2 registers
map to channel_0, AMB_3 registers
map to channel_0, AMB_4 registers
map to channel_0, AMB_5 registers
map to channel_0, AMB_6 registers
map to channel_0, AMB_7 registers
map to channel_0, AMB_8 registers
map to channel_0, AMB_9 registers
map to channel_0, AMB_A registers
map to channel_0, AMB_B registers
map to channel_0, AMB_C registers
map to channel_0, AMB_D registers
map to channel_0, AMB_E registers
map to channel_0, AMB_F registers
map to channel_1, AMB_0 registers
map to channel_1, AMB_1 registers
map to channel_1, AMB_2 registers
map to channel_1, AMB_3 registers
map to channel_1, AMB_4 registers
map to channel_1, AMB_5 registers
map to channel_1, AMB_6 registers
map to channel_1, AMB_7 registers
map to channel_1, AMB_8 registers
map to channel_1, AMB_9 registers
map to channel_1, AMB_A registers
map to channel_1, AMB_B registers
map to channel_1, AMB_C registers
map to channel_1, AMB_D registers
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Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet