QG5000XSL9TH Datasheet, PDF (386/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Functional Description
Table 5-29. Intel 5000X Chipset MCH Frequencies for PCI Express
Domain
PCI Express phit
PCI Express flit
Frequency
2.5 GHz
250 MHz
Reference
Clock
PECLK
PECLK
5.17.2
JTAG
TCK is asynchronous to core clock. For private TAP register accesses, one TCK cycle is a
minimum of 10 core cycles. The TCK high time is a minimum of 5 core cycles in
duration. The TCK low time is a minimum of 5 core cycles in duration. The possibility of
metastability during private register access is mitigated by circuit design. A
metastability hardened synchronizer will guarantee an MTBF greater than 10⁷ years.
For public TAP register accesses, TCK operates independently of the core clock.
5.17.3
SMBus Clock
The SMBus clock is synchronized to the core clock. Data is driven into the Intel 5000P
Chipset with respect to the serial clock signal. Data received on the data signal with
respect to the clock signal will be synchronized to the core using a metastability
hardened synchronizer guaranteeing an MTBF greater than 10⁷ years. The serial clock
can not be active until 10 mS after RESETI# deassertion. When inactive, the serial
clock should be deasserted (High). The serial clock frequency is 100 KHz.
5.17.4
GPIO Serial Bus Clock
The transmitted 100 Khz Virtual Pin Interface (VPI) clock (one of the SCL[4:0]’s) is
derived from the core clock. The PCI Express Hot-Plug signals reside on the Virtual Pin
Interface.
5.17.5 Clock Pins
Table 5-30. Clock Pins (Sheet 1 of 2)
Pin Name
BUSCLKP
BUSCLKN
PECLKP
PECLKN
FBD{0/1}CLKP
FBD{0/1}CLKN
PLLBYPASS
PRCSPEED
VCC{0/1/2/3}AMP
VSS{0/1/2/3}AMP
VCCAPB
VSSAPB
VCCAPE
Pin Description
Processor bus clock
Processor bus clock (Complement)
PCI Express clock
PCI Express clock (Complement)
FB-DIMM clocks
FB-DIMM clocks (Complement)
PLL Bypass mode
BUSCLK:CORECLK Bus Ratio Selector
Analog power supply for FB-DIMM PLLs
Analog ground for FB-DIMM PLLs
Analog power supply for processor bus PLL
Analog ground for processor bus PLL
Analog power supply for PCI Express PLLs
386
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet