QG5000XSL9TH Datasheet, PDF (226/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Register Description
Device¹:22, 21
Function:0
Offset:4Fh
Bit
Attr
Default
Description
7:0
RW
00h
NEXTSTATE: FBD Branch State Control field
This field is written by software to change the branch state. It returns the last
value written when read. Some states can only be entered under hardware
control and should not be written by software.
00h: Reset
10h: Init
20h: Ready²
30h: Active²
40h: Redundant²
50h: Disabled
60h: Redundancy Loss² - may not be written
70h: Recovery Reset - (should only be selected when MC.MIRROR is set)
80h: Recovery Init - (should only be selected when MC.MIRROR is set)
90h: Recovery Ready² - (should only be selected when MC.MIRROR is set)
A0h: Resilver² - (should only be selected when MC.MIRROR is set)
(should not be written while FBDST.STATE=Resilver)
B0h: Recovery Fault
C0h: Recovery Failed
D0h: Fault
Notes:
1. The nomenclature is Device 22 (branch 1), 21 (branch 0)
2. Both sync and refresh packets are sent during this mode.
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Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet