QG5000XSL9TH Datasheet, PDF (328/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Functional Description
Figure 5-13. Thermal Throttling Activation Algorithm
T H R M T H R T = T H R T L O W (In itia lize to b a se-lev el A ctiv a tio n s)
if (G lo b a l_ T im er e xp ire s)
{
if (M C .G T W _ M O D E = = 1 ) // C h o o se w in d o w siz e b a sed o n m o d e se ttin g
{ G lo b a l_ T im er = 4 * 1 3 4 4
// V a lid a tio n & D eb u g M o d e
}
e ls e
{ G lo b a l_ T im e r = 0 .6 5 6 2 5 * 2 ^ 2 5 = 1 6 3 8 4 * 1 3 4 4
// m a k e g lo b a l th ro ttlin g w in d o w a n in teg ra l m u ltip le o f th e clo sed lo o p w in d o w
}
if (T H R T C T R L .T H R M H U N T = = 1 )
{
fo r (ea c h D IM M -p a ir [m ] o n e a ch b ra n ch [n ]) /* m = 0 ..3 , n = 0 ..1 * /
{
if (te m p era tu r e o f a n y D IM M [i] > = T m id ) /* 0 < = i < = 3 * /
{ if (T H R T C T R L .T H R M O D E = = 0 )
if (T H R M T H R T > T H R T M ID )
{ /* T h is w ill ca p th e sta rt p o in t to T H R T M ID if th ere is a * /
/* sp ik e in th e G B T e m p er a tu re fro m T lo w to T m id & b ey o n d * /
/* P ro v id es b etter th ro ttlin g an d co n tro l * /
T H R M T H R T = T H R T M ID
}
e ls e
/* S ta irca se ro ll d o w n m a y h a p p en fo r su b seq u en t sa m p lin g s
{ if (th e te m p era tu re o f a n y D IM M w h ich is a b o v e T m id , in crea sed )
{ T H R M T H R T = m a x(T H R M T H R T - 2, T H R T H I)
} /* O th erw ise reta in la st T H R M T H R T v a lu e * /
} /* en d o f T H R M T H R T > T H R T M ID ch eck * /
}
e ls e
{
THRM THRT = THRTHI
} /* en d o f T H R M O D E = = 0 ch ec k * /
}
else if ((te m p e ra tu re o f a n y D IM M [i] > = T lo w [i])
& & (te m p era tu re o f a ll D IM M ’s[i] < T m id [i]))
{
T H R M T H R T = T H R T M ID
}
else if (tem p er a tu re o f a ll D IM M ’s[i] < T lo w [i]))
{
if (G B L T H R T = = 1 )
{
T H R M T H R T = T H R T M ID
}
e ls e
{
THRM THRT = THRTLOW
}
}
}
}
e ls e
{ if (G B L T H R T = = 1 )
{
T H R M T H R T = T H R T M ID
}
e ls e
{ THRM THRT = THRTLOW
}
}
}
328
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet