QG5000XSL9TH Datasheet, PDF (41/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Signal Description
2.11.1
Intel^® 5000P Customer Reference Platform (SRP) Reset
Topology
Typical platform level reset implementation is described in the Dual-Core Intel^® Xeon^®
Processor 5000 series (1066 MHz) and Intel^® 5000 Sequence Chipsets Platform Design
Guide (PDG).
2.12
2.12.1
Signals Used as Straps
Functional Straps
The PEWIDTH signals are used to determine the widths of the 7 PCI Express ports.
Signal Name
PEWIDTH[3:0]
Type
Power/
Other
Description
PCI Express Port Width Strapping Pins:
§
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet
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