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QG5000XSL9TH Datasheet, PDF (242/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)
Register Description
3.9.25.3
FBD[3:2]IBTXPGCTL: FB-DIMM Intel IBIST Pattern Generator Control
Register
This register contains bits to control the operation of the Intel IBIST pattern generator.
Device: 22
Function: 0
Offset: 284h, 184h
Bit Attr Default
Description
31:26 RWST
25:21 RWST
20 RWST
19:13 RWST
12:10 RWST
9:3 RWST
2:0 RWST
OVRLOPCNT: Overall Loop Count[5:0]
04h 0h: Send no Intel IBIST data in payload
1h-3Fh: The number of times to loop through all the patterns
CNSTGENCNT: Constant Generator Loop Counter[4:0]
00h: Disable constant generator output
0h 01h: 1Fh The number of times the Modulo-N counter should be repeated before
going to the next pattern type. Each buffer transfer is composed of two frames
(loop counts of 24-bits each).
CNSTGENSET: Constant Generator Setting
0
0: Generate 0
1: Generate 1
MODLOPCNT: Modulo-N Loop Counter [7:0]
Each count represents 24-bits of the pattern specified by the MODPERIOD bit field.
19h 00h: Disable Pattern Output
01h: 7Fh The number of times the Pattern Buffer should loop before going to the
next
MODPERIOD: Period of the Modulo-N counter
001: L/2 0101_0101_0101_0101_0101_0101
010: L/4 0011_0011_0011_0011_0011_0011
1h
011: L/6 0001_1100_0111_0001_1100_0111
100: L/8 0000_1111_0000_1111_0000_1111
110: L/12 0000_0000_0000_1111_1111_1111
PATTLOPCNT: Pattern Buffer Loop Counter[6:0]
00h: Disable Pattern Output
19h 01h-3Fh: The number of times the Pattern Buffer should be repeated before going
to the next pattern type. Each buffer transfer is composed of two frames (loop
counts of 24-bits each).
PTGENORD: Pattern Generation Order
000: Pattern Store + Modulo N Cntr + Constant Generator
001: Pattern Store + Constant Generator + Modulo N Cntr
010: Modulo N Cntr + Pattern Store + Constant Generator
000 011: Modulo N Cntr + Constant Generator + Pattern Store
100: Constant Generator + Pattern Store + Modulo N Cntr
101: Constant Generator + Modulo N Cntr + Pattern Store
110: Reserved
111: Reserved
242
Intel® 5000X Chipset Memory Controller Hub (MCH) Datasheet