English
Language : 

QG5000XSL9TH Datasheet, PDF (402/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)
Testability
6.1.10
Public Data Register Control
Table 6-4 define the actions that occur in the selected data register in controller states
that can alter data register contents. If a TAP state does not affect the selected data
register, then the corresponding table entry will be blank. Not all data registers have a
parallel output latch. All data registers have a parallel input latch. Several table entries
are still under investigation.
Table 6-4.
Actions of Public TAP Instructions During Various TAP States
Instruction
Bypass
HighZ
IDcode
Extest
Sample/Preload
Capture-DR
Shift-DR
Update-DR
Reset Bypass Register
Reset Bypass Register
Load device ID into
register
Load input pin values into
Boundary Scan shift
register
Load pin values into
Boundary Scan shift
register
Shift Bypass register
Shift Bypass register
Shift ID register
Shift Boundary Scan shift
register
Shift Boundary Scan shift
register
Load Boundary Scan shift
register into Boundary
Scan register; drive pins
accordingly
Load Boundary Scan shift
register into Boundary
Scan register
6.1.11
Bypass Register
This register provides the minimal length path between TDI and TDO. It is loaded with a
logical 0 during the Capture-DR state. The Bypass Register is a single bit register and is
used to provide a minimum-length serial path through the device. This allows more
rapid movement of test data to and from other components in the system. When in
Bypass Mode, the operation of the test logic shall have no effect on the operation of the
devices normal logic. Refer to Figure 6-7 for an implementation example.
6.1.11.1 Bypass Register Definition
Figure 6-7. Bypass Register Implementation
6.1.12
Device ID Register
This register contains the device identification code in the format shown in Table 6-5
Three fields are predefined as the version number (stepping number), the
manufacturer’s identification code, and a logical 1 field. The component identification
field is sub-divided into 3 fields. The Product Segment field identifies if the component
is intended for CPU, laptop, desktop, server, etc. Product Type further defines the
402
Intel® 5000X Chipset Memory Controller Hub (MCH) Datasheet