QG5000XSL9TH Datasheet, PDF (221/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Register Description
3.9.22.15 NRECFBDC - Non-Recoverable FB-DIMM Error Log Register C
This register latches information on the first detected fatal northbound CRC error.
Device:
Function:
Offset:
Version:
16
1
D0h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
Bit
31:0
Attr
ROST
Default
0h
Description
BITS: Bits [95:64] of the packet
3.9.22.16 NRECFBDD - Non-Recoverable FB-DIMM Error Log Register D
This register latches information on the first detected fatal northbound CRC error.
Device:
Function:
Offset:
Version:
16
1
D4h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
Bit
31:0
Attr
ROST
Default
0h
Description
BITS: Bits [127:96] of the packet
3.9.22.17 NRECFBDE - Non-Recoverable FB-DIMM Error Log Register E
This register latches information on the first detected fatal northbound CRC error.
Device:
Function:
Offset:
Version:
16
1
D8h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
Bit
31:28
27:0
Attr
RV
ROST
Default
0h
0h
Description
Reserved
BITS: Bits [155:128] of the packet
3.9.22.18 REDMEMB: Recoverable Memory Data Error Log Register B
This register latches information on the first detected correctable ECC error.
Device:
16
Function: 1
Offset:
7Ch
Bit
31:18
17:0
Attr
RV
ROST
Default
0
0h
Description
Reserved
ECC _Locator: identifies the adjacent symbol pair in error for correctable
errors according to Table 3-49, Figure 5-2 and Figure 5-4.
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet
221