QG5000XSL9TH Datasheet, PDF (125/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Register Description
Table 3-1. GIO Port Mode Selection
GIO Port (IOU0)
GIO Port (IOU1)
GPMNXT1
[2:0]
(IOU0)
Port0
(ESI)
Port1
(RSVD)
Port2
3'b000
3'b001
3'b010
3'b011
3'b100
x4
RSVD
x4
invalid
x4
RSVD
x8
invalid
invalid
3'b101
3'b110
3'b111
invalid
invalid
x4
RSVD
RSVD
Port3
GPMNXT0
[2:0]
(IOU1)
Port4
x4
3'b000
x4
3'b001
x8
N/A
3'b010
x4
3'b011
x8
3'b100
x16
3'b101
3'b110
3'b111
invalid
invalid
RSVD
Port5
x4
N/A
x4
N/A
N/A
Port6
Port7
x4
x4
x4
x4
x8
N/A
x8
N/A
N/A
N/A
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet
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