QG5000XSL9TH Datasheet, PDF (443/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Ballout and Package Information
Table 8-2. Intel 5000X Chipset MCH Signals (by Signal Name) (Sheet 8 of 19)
Ball No.
Signal Name
Buffer Type Direction
Ball No.
Signal Name
Buffer Type Direction
T8
PE2TP[0]
PEX
O
U4
PE2TP[1]
PEX
O
N1
PE2TP[2]
PEX
O
R2
PE2TP[3]
PEX
O
W2
PE3RN[0]
PEX
I
V6
PE3RN[1]
PEX
I
W8
PE3RN[2]
PEX
I
U10
PE3RN[3]
PEX
I
V2
PE3RP[0]
PEX
I
V5
PE3RP[1]
PEX
I
W7
PE3RP[2]
PEX
I
U9
PE3RP[3]
PEX
I
V3
PE3TN[0]
PEX
O
W4
PE3TN[1]
PEX
O
U7
PE3TN[2]
PEX
O
V9
PE3TN[3]
PEX
O
U3
PE3TP[0]
PEX
O
W5
PE3TP[1]
PEX
O
U6
PE3TP[2]
PEX
O
V8
PE3TP[3]
PEX
O
E12
PE4RN[0]
PEX
I
F11
PE4RN[1]
PEX
I
E10
PE4RN[2]
PEX
I
L10
PE4RN[3]
PEX
I
F12
PE4RP[0]
PEX
I
G11
PE4RP[1]
PEX
I
D10
PE4RP[2]
PEX
I
K10
PE4RP[3]
PEX
I
J12
PE4TN[0]
PEX
O
B12
PE4TN[1]
PEX
O
D11
PE4TN[2]
PEX
O
E1
PE7RN[1]
PEX
I
H4
PE7RN[2]
PEX
I
L4
PE7RN[3]
PEX
I
F3
PE7RP[0]
PEX
I
D1
PE7RP[1]
PEX
I
H3
PE7RP[2]
PEX
I
K4
PE7RP[3]
PEX
I
G4
PE7TN[0]
PEX
O
G8
PE5RN[2]
PEX
I
H7
PE5RN[3]
PEX
I
H10
PE5RP[0]
PEX
I
C9
PE5RP[1]
PEX
I
F8
PE5RP[2]
PEX
I
G7
PE5RP[3]
PEX
I
H9
PE5TN[0]
PEX
O
E9
PE5TN[1]
PEX
O
C8
PE5TN[2]
PEX
O
E7
PE5TN[3]
PEX
O
J9
PE5TP[0]
PEX
O
F9
PE5TP[1]
PEX
O
D8
PE5TP[2]
PEX
O
D7
PE5TP[3]
PEX
O
C5
PE6RN[0]
PEX
I
E3
PE6RN[1]
PEX
I
F5
PE6RN[2]
PEX
I
K8
PE6RN[3]
PEX
I
C6
PE6RP[0]
PEX
I
E4
PE6RP[1]
PEX
I
F6
PE6RP[2]
PEX
I
J8
PE6RP[3]
PEX
I
M8
PE6TN[0]
PEX
O
D4
PE6TN[1]
PEX
O
C2
PE6TN[2]
PEX
O
J6
PE6TN[3]
PEX
O
M9
PE6TP[0]
PEX
O
D5
PE6TP[1]
PEX
O
C3
PE6TP[2]
PEX
O
H6
PE6TP[3]
PEX
O
F2
PE7RN[0]
PEX
I
M2
RSVD
No Connect
M3
RSVD
No Connect
M5
RSVD
No Connect
M6
RSVD
No Connect
M12
RSVD
No Connect
N2
RSVD
No Connect
N5
RSVD
No Connect
N7
RSVD
No Connect
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet
443