QG5000XSL9TH Datasheet, PDF (278/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

System Address Map
Figure 4-1. System Memory Address Map
64 GB
PCI-E/PCI-X/PCI
Memory Address
Range
Graphics
Memory
AGP Address Graphics (AGP)
Range
Aperture
4.1
4.1.1
Top of the Physical
DRAM Memory
Main Memory
Address Range
Independently Programmable Non-
Overlapping Memory Windows
0
System Memory Address Ranges
The Intel 5000X chipset MCH platform supports 36 bits (64 GB) of physical memory Or
maximum of 40-bit system address with up to 64 GB or physical memory support.
Other address spaces supported by the Intel 5000P Chipset are:
• 36-bit local address supported over the FB-DIMM channels for physical memory
space.
• 32 and 64 bit address bit formats supported for PCI Express interfaces.
The chipset treats accesses to various address ranges in different ways. There are fixed
ranges like the compatibility region below 1 MB, and variable ranges like the memory
mapped I/O range. The locations of these ranges in the memory map are illustrated in
Figure 4-2.
32/64-bit addressing
For inbound and outbound writes and reads, the Intel 5000P chipset MCH supports
64-bit address format. If an outbound transaction’s address is a 32-bit address, the
Intel 5000P Chipset MCH will issue the transaction with a 32-bit addressing format on
PCI Express. Only when the address requires more than 32 bits will the Intel 5000P
Chipset MCH initiate transactions with 64-bit address format. It is the responsibility of
the software to ensure that the relevant bits are programmed for 64-bits based on the
OS limits. (for example, 40-bits for Intel 5000P Chipset MCH).
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Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet