QG5000XSL9TH Datasheet, PDF (403/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Testability
component within a segment by stating it to be a CPU, memory, chipset, etc. The last
field is a sequential component number assignment. This value will be maintained as
sequential as possible depending on when each component’s request was satisfied in
the corporate database.
Table 6-5. Intel® 5000P chipset Device ID Codes
Component Identification Fields
Device
Versio
n
Product
Product
Manufacturing
Component
ID
“1”
Entire Code
(hex)
Segment
Type
Number
Intel
5000P
Chipset
MCH – A0
4
0000
6
000100
5
01000
5
01000
11
00000001001
1
32
1
0x0118013
6.1.12.1 Device ID Register
6.1.13
JTAG encode: 0000010
Bit
31:28
27:22
21:17
16:12
11:1
0
Attr
R
R
R
R
R
R
Default
0000
000100
01000
Listed in next
column
00000001001
1
Description
Version: This number changes for each stepping including metal
“dash” steppings.
The most significant 2 bits are the stepping number: 00 A-step;
01 B-step, 10 C-step, and 11 D-step.
The least significant 2 bits is the revision within a stepping.
Product Segment: Number assigned that determines the market
segment into which this component belongs. Since this format is
new, the value for chipset is shown with others as an example.
R&D:000 000
CPU:100 000
Desktop:010 000
Laptop:001 000
Server:000 100
etc.
Product Type: Number assigned to further define the component
within the market segment. Since this format is new, the value
for chipset is shown with others as an example.
Test:00 000
CPU:10 010
Memory:00 100
Modem:00 101
Chipset:01 000
etc.
Component Number: Sequential listing based on request to
database.
Intel® 5000P chipset MCH:01000b
Manufacturing ID: This number is assigned to Intel.
‘1’
Boundary Scan Register
The following requirements apply to those interfaces that continue to support boundary
scan (bscan) or the miscellaneous I/O signals.
• Each signal or clock pin (with the exception of the TAP specific pins TCK, TDI, TDO,
TMS, & TRST#) will have an associated Boundary-Scan Register Cell. Differential
Driver or Receiver Pin Pairs that cannot be used independently shall be considered
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet
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