QG5000XSL9TH Datasheet, PDF (65/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Register Description
Table 3-21. Device 16, Function 0: Processor Bus, Boot, and Interrupt
DID
CCR
HDR
VID
00h
04h
RID
08h
0Ch
10h
14h
18h
1Ch
20h
24h
XTPR0
XTPR1
XTPR2
XTPR3
XTPR4
XTPR5
XTPR6
XTPR7
XTPR8
XTPR9
28h
SID
SVID
2Ch
30h
34h
38h
3Ch
CPURSTCAPTMR
SYRE
40h
POC
44h
AMBASE
48h
XTPR10
XTPR11
XTPR12
XTPR13
XTPR14
XTPR15
BOFL0
BOFL1
BOFL2
AMR
MAXAMB
PERCH
MAXCH
AMBSELECT
PAM2
PAM1
PAM0
PAM6
PAM5
PAM4
PAM3
EXSMRTOP EXSMRC
SMRAMC EXSMRAMC
HECBASE
REDIRBUCKETS
REDIRCTL
4Ch
50h
54h
58h
5Ch
60h
64h
68h
6Ch
70h
74h
78h
7Ch
BOFL3
SPAD0
SPAD1
SPAD2
SPAD3
SPADS0
SPADS1
SPADS2
SPADS3
PROCENABLE
80h
84h
88h
8Ch
90h
94h
98h
9Ch
A0h
A4h
A8h
ACh
B0h
B4h
B8h
BCh
C0h
C4h
C8h
CCh
D0h
D4h
D8h
DCh
E0h
E4h
E8h
ECh
F0h
F4h
F8h
FCh
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet
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