QG5000XSL9TH Datasheet, PDF (233/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Register Description
3.9.23.11 AMBPRESENT[1:0][1:0] - FB-DIMM AMB Slot Present Register
These registers control configuration transaction routing to AMB slots on a per FB-
DIMM channel basis. This includes both accesses through memory mapped region
(based on AMBASE register, see Section 3.8.3.1) and AMBSELECT (for SMBus/JTAG
access only, access via device 9, function 0. See Section 3.8.3.3). Software needs to
program this register after SPD discovery process. Intel 5000P Chipset MCH will check
this register before it sends actual FB-DIMM AMB configuration transaction.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
21
0
66h, 64h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
22
0
66h, 64h
Intel 5000P Chipset
Bit
15:0
Attr
RWO
Default
0h
Description
AMBSP: Slot [bit_position] present in the FBD channel
1: Indicates AMB slot addressed by DS[3:0] in decimal = [bit_position] is
present; configuration transaction will be routed to FB-DIMM channel. Bit 15
controls DS[3:0] = 1111b, bit 14 controls DS[3:0] = 1110b,..., bit 0 controls
DS[3:0] = 0000b.
0: AMB slot addressed by DS[3:0] in decimal = [bit_position] is not
populated; no configuration transaction will be sent to FB-DIMM channel.
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet
233