QG5000XSL9TH Datasheet, PDF (352/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH)

Functional Description
Figure 5-19. MCH to Intel 631xESB/632xESB I/O Controller Hub Port Configurations
MCH
P o r t3
P o r t2
P C I- E x4 P C I- E x4
2 G B/s e c 2 G B/s e c
ESI
ESI
2 G B/s e c
In te l® 6 3 1 x E S B /6 3 2 x E S B I/O C o n tro lle r
Hub
5.13.4
PCI Express General Purpose Ports
Port 4, Port 5, Port 6, and Port 7 are configurable for general purpose I/O applications.
The Intel 5000X chipset MCH combines these four general purpose x4 ports into a
single optimized x16 high performance graphics interface. This interface is depicted in
Figure 5-20. These ports contain several architectural enhancements to improve
graphics performance.
352
Intel^® 5000X Chipset Memory Controller Hub (MCH) Datasheet