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| QG5000XSL9TH Datasheet, PDF (37/458 Pages) Intel Corporation – Intel 5000X Chipset Memory Controller Hub (MCH) | |||
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Signal Description
Figure 2-4. Hard Reset
ICHRST#
RESETI#
T9
Synchronized RESETI#
processor RESET#
POC
INITIN#
Events
FBD
PCI-
PCI-Express ComExpparteibsislity
BUSCLK
PLL's
Sticky Bit Enable
SYRE.SAVCFG
T6
T10
T4
Reset
T11
T13
T14
T17
Array Init
Done
Init
T12
initialization
T15
Level
full operation
DMI handshake done
2.10.1.4 RESETI# Retriggering Limitations
Figure 2-5 shows the timing for a RESETI# retrigger.
Figure 2-5. RESETI# Retriggering Limitations
RESETI#
T16
T5
Incomplete
Initialization
T9
Complete Initialization
Intel® 5000X Chipset Memory Controller Hub (MCH) Datasheet
37
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